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Introduction to Computer Systems (ICS)

Welcome to the XJTU-ICS course! This course offers a programmer’s perspective on how computer systems execute programs store data, and communicate with each other.

A key focus of the course is on developing your system programming skills. To achieve this, the course includes 6 hands-on lab assignments, which will help you strengthen your understanding of how systems operate at the code level. These lab assignments make up approximately 50% of your final grade, emphasizing the importance of practical programming in mastering the concepts covered in the course.

Enjoy!

Prerequisites: C Programming

Textbook: Randal E. Bryant and David R. O'Hallaron, Computer Systems: A Programmer's Perspective, Third Edition, Pearson, 2016

Announcements

Getting Help

  • Piazza
  • QQ group: 1076865018
  • Office Hours
    • Danfeng Shan: 16:00-18:00, Every Thursday
    • Hao Li: TBD

Schedule

Week Date Lecture Instructors Materials Reading Labs
1 2026-03-03 Overview Hao Li && Danfeng Shan Slides 1
1 2026-03-05 Bits, Bytes, & Integers Danfeng Shan Slides 2.1 DataLab out
2 2026-03-10 Bits, Bytes, & Integers Danfeng Shan Slides 2.2-2.3
2 2026-03-12 Machine Prog: Basics Danfeng Shan Slides 3.1 BombLab out
2 2026-03-15 No Lecture DataLab due
3 2026-03-17 Machine Prog: Basics Danfeng Shan Slides 3.2-3.5
3 2026-03-19 Machine Prog: Control Danfeng Shan Slides 3.6
4 2026-03-24 Machine Prog: Procedures Danfeng Shan Slides 3.7
4 2026-03-26 Machine Prog: Data Danfeng Shan Slides 3.8
5 2026-03-31 Machine Prog: Data Danfeng Shan Slides 3.9
5 2026-04-02 Machine Prog: Advanced Danfeng Shan Slides 3.10 AttackLab out
5 2026-04-05 No Lecture BombLab due
6 2026-04-07 No Lecture (XJTU 130th Anniversary)
6 2026-04-09 Memory Hierarchy Danfeng Shan Slides 6.1
6 2026-04-11 Memory Hierarchy Danfeng Shan Slides 6.2-6.3
7 2026-04-14 Cache Memories Danfeng Shan Slides 6.4
7 2026-04-16 Cache Memories Danfeng Shan Slides 6.5-6.7 CacheLab out
7 2026-04-19 No Lecture AttackLab due
8 2026-04-21 Processor Architecture: Basics Danfeng Shan Slides 4.1
8 2026-04-23 Processor Architecture: Basics Danfeng Shan Slides 4.1
9 2026-04-28 Machine-Independent Optimizations Hao Li Slides 5.1-5.6
9 2026-04-30 Machine-Dependent Optimizations Hao Li Slides 5.7-5.11
9 2026-05-03 No Lecture CacheLab (Part A) due
10 2026-05-05 No Lecture (Labour Day)
10 2026-05-07 Linking I: Basic Concepts and Procedures Hao Li Slides 7.1-7.7
10 2026-05-10 No Lecture CacheLab (Part B) due
11 2026-05-12 Linking II: Static and Dynamic Linking Hao Li Slides 7.7-7.13
11 2026-05-14 Operating System: History and Three Easy Pieces Hao Li Slides
12 2026-05-19 Processes and Multitasking Hao Li Slides 8.2-8.4
12 2026-05-21 Exceptional Control Flow Hao Li Slides 8.5-8.7
12 2026-05-24 No Lecture Optimization Lab due
13 2026-05-26 Processor Architecture: Logical Design Danfeng Shan Slides 4.2
13 2026-05-28 Processor Architecture: Sequential Danfeng Shan Slides 4.3
14 2026-06-02 Processor Architecture: Pipeline (Principle) Danfeng Shan 4.4
14 2026-06-04 Processor Architecture: Pipeline (Implementation) Danfeng Shan 4.5
15 2026-06-09 Processor Architecture: GPU & Kunpeng Danfeng Shan
15 2026-06-11 Virtual Memory: Concepts TBD 9.1-9.3
16 2026-06-16 Virtual Memory: Concepts TBD 9.4-9.6
16 2026-06-18 Virtual Memory: Details TBD 9.7-9.8